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FPGA Developer

Fellowship Fully funded
CERN (European Organization for Nuclear Research) Switzerland 2026

Information

The FPGA Developer is a funded fellowship-position within CERN's Accelerator Systems Department, Radio Frequency Group, contributing to the modernisation of Low-Level Radio Frequency (LLRF) systems and the design, prototyping and commissioning of a next-generation digital LLRF cavity controller. The role involves FPGA firmware development, Python-based test and analysis tool development, hardware integration, laboratory validation and on-site commissioning. The position offers a contract with a monthly net stipend, social benefits and the possibility of contract extension up to 36 months.

Benefits

Monthly net stipend (6372-7004 CHF), 30 days paid leave plus 2 weeks annual closure, health insurance for self/spouse/children, CERN Pension Fund membership, family/child allowances, relocation package, on-the-job and formal training including language classes, possibility to extend contract up to 36 months.

Eligibility

Applicants must be nationals of a CERN Member State or Associate Member State (with some nationalities currently excluded). By the application deadline applicants must hold a master’s degree with 2 to 6 years of professional experience since graduation or a PhD with a maximum of 3 years of professional experience; applicants with only a bachelor’s degree are not eligible. Candidates must not have previously held a CERN fellow or graduate contract.

Application

Apply through CERN's job portal using the provided online application link; submit CV, diploma or certificate of achievement and any other relevant documents.

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